sven/libicsneo
1
0
Fork 0
mirror of https://github.com/intrepidcs/libicsneo.git synced 2026-08-05 01:18:36 +02:00
Code Issues Projects Releases Wiki Activity

C2: Add ChipVersions

Browse Source 
Also fixes some formatting issues.
This commit is contained in:
David Rebbe
2026-05-14 13:39:39 -04:00
committed by Kyle Schwarz
parent e926e10dc5
commit c3762bbf22
9 changed files with 834 additions and 138 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/icsneo/icsneoc2types.h
+139
View File
@@ -444,6 +444,145 @@ typedef enum _icsneoc2_tc10_sleep_status_t {
typedef uint8_t icsneoc2_tc10_sleep_status_t;
typedef struct icsneoc2_chip_versions_t icsneoc2_chip_versions_t;
typedef enum _icsneoc2_chip_id_t {
icsneoc2_chip_id_neovifire_mchip = 0,
icsneoc2_chip_id_neovifire_lchip = 1,
icsneoc2_chip_id_neovifire_uchip = 2,
icsneoc2_chip_id_neovifire_jchip = 3,
icsneoc2_chip_id_valuecan3_mchip = 4,
icsneoc2_chip_id_neoviecu_mpic = 6,
icsneoc2_chip_id_neoviievb_mpic = 7,
icsneoc2_chip_id_neovipendant_mpic = 8,
icsneoc2_chip_id_neovifire_vnet_mchip = 9,
icsneoc2_chip_id_neovifire_vnet_lchip = 10,
icsneoc2_chip_id_neoviplasma_core = 11,
icsneoc2_chip_id_neoviplasma_hid = 12,
icsneoc2_chip_id_neovianalog_mpic = 13,
icsneoc2_chip_id_neoviplasma_analog_core = 14,
icsneoc2_chip_id_neoviplasma_flexray_core = 15,
icsneoc2_chip_id_neoviplasma_core_1_12 = 16,
icsneoc2_chip_id_neovifire_slave_vnet_mchip = 17,
icsneoc2_chip_id_neovifire_slave_vnet_lchip = 18,
icsneoc2_chip_id_neoviion_core = 19,
icsneoc2_chip_id_neoviion_hid = 20,
icsneoc2_chip_id_neoviion_core_loader = 21,
icsneoc2_chip_id_neoviion_hid_loader = 22,
icsneoc2_chip_id_neoviion_fpga_bit = 23,
icsneoc2_chip_id_neovifire_vnet_ep_mchip = 24,
icsneoc2_chip_id_neovifire_vnet_ep_lchip = 25,
icsneoc2_chip_id_neovianalogout_mchip = 26,
icsneoc2_chip_id_neovimost25_mchip = 27,
icsneoc2_chip_id_neovimost50_mchip = 28,
icsneoc2_chip_id_neovimost150_mchip = 29,
icsneoc2_chip_id_valuecan4_4_mchip = 30,
icsneoc2_chip_id_valuecan4_4_schip = 31,
icsneoc2_chip_id_cmprobe_zynq = 33,
icsneoc2_chip_id_eevb_stm32 = 34,
icsneoc2_chip_id_neovifire_slave_vnet_ep_mchip = 35,
icsneoc2_chip_id_neovifire_slave_vnet_ep_lchip = 36,
icsneoc2_chip_id_radstar_mchip = 37,
icsneoc2_chip_id_valuecanrf_mchip = 38,
icsneoc2_chip_id_neovifire2_mchip = 39,
icsneoc2_chip_id_neovifire2_cchip = 40,
icsneoc2_chip_id_neovifire2_core = 41,
icsneoc2_chip_id_neovifire2_blechip = 42,
icsneoc2_chip_id_neovifire2_zynq = 43, // FIRE2 MVNET Z - Zynq
icsneoc2_chip_id_neovifire2_securitychip = 44,
icsneoc2_chip_id_radgalaxy_zynq = 45,
icsneoc2_chip_id_neovifire2_vnet_mchip = 46,
icsneoc2_chip_id_neovifire2_slave_vnet_a_mchip = 47,
icsneoc2_chip_id_neovifire2_slave_vnet_a_cchip = 48,
icsneoc2_chip_id_neovifire2_vnet_cchip = 49,
icsneoc2_chip_id_neovifire2_vnet_core = 50,
icsneoc2_chip_id_radstar2_zynq = 51,
icsneoc2_chip_id_vividcan_mchip = 52,
icsneoc2_chip_id_neoobd2sim_mchip = 53,
icsneoc2_chip_id_neovifire2_vnetz_mchip = 54,
icsneoc2_chip_id_neovifire2_vnetz_zynq = 55,
icsneoc2_chip_id_neovifire2_slave_vnetz_a_mchip = 56,
icsneoc2_chip_id_neovifire2_slave_vnetz_a_zynq = 57,
icsneoc2_chip_id_vividcan_ext_flash = 58,
icsneoc2_chip_id_vividcan_nrf52 = 59,
icsneoc2_chip_id_cmprobe_zynq_unused = 60, // Double defined
icsneoc2_chip_id_neoobd2pro_mchip = 61,
icsneoc2_chip_id_valuecan4_1_mchip = 62,
icsneoc2_chip_id_valuecan4_2_mchip = 63,
icsneoc2_chip_id_valuecan4_4_2el_core = 64,
icsneoc2_chip_id_neoobd2pro_schip = 65,
icsneoc2_chip_id_valuecan4_2el_mchip = 67,
icsneoc2_chip_id_neoecuavbtsn_mchip = 68,
icsneoc2_chip_id_neoobd2pro_core = 69,
icsneoc2_chip_id_radsupermoon_zynq = 70,
icsneoc2_chip_id_radmoon2_zynq = 71,
icsneoc2_chip_id_vividcanpro_mchip = 72,
icsneoc2_chip_id_vividcanpro_ext_flash = 73,
icsneoc2_chip_id_radpluto_mchip = 74,
icsneoc2_chip_id_radmars_zynq = 75,
icsneoc2_chip_id_neoecu12_mchip = 76,
icsneoc2_chip_id_radiocanhub_mchip = 77,
icsneoc2_chip_id_flexray_vnetz_zchip = 78,
icsneoc2_chip_id_neoobd2_lcbadge_mchip = 79,
icsneoc2_chip_id_neoobd2_lcbadge_schip = 80,
icsneoc2_chip_id_radmoonduo_mchip = 81,
icsneoc2_chip_id_neovifire3_zchip = 82,
icsneoc2_chip_id_flexray_vnetz_fchip = 83,
icsneoc2_chip_id_radjupiter_mchip = 84,
icsneoc2_chip_id_valuecan4industrial_mchip = 85,
icsneoc2_chip_id_etherbadge_mchip = 86,
icsneoc2_chip_id_radmars_3_zynq = 87,
icsneoc2_chip_id_radgigastar_usbz_zynq = 88,
icsneoc2_chip_id_radgigastar_zynq = 89,
icsneoc2_chip_id_rad4g_mchip = 90,
icsneoc2_chip_id_neovifire3_schip = 91,
icsneoc2_chip_id_radepsilon_mchip = 92,
icsneoc2_chip_id_rada2b_zchip = 93,
icsneoc2_chip_id_neoobd2dev_mchip = 94,
icsneoc2_chip_id_neoobd2dev_schip = 95,
icsneoc2_chip_id_neoobd2simdoip_mchip = 96,
icsneoc2_chip_id_sfpmodule_88q2112_mchip = 97,
icsneoc2_chip_id_radepsilont_mchip = 98,
icsneoc2_chip_id_radepsilonexpress_mchip = 99,
icsneoc2_chip_id_radproxima_mchip = 100,
icsneoc2_chip_id_newdevice57_zchip = 101,
icsneoc2_chip_id_rad_galaxy_2_zmpchip_id = 102,
icsneoc2_chip_id_newdevice59_mchip = 103,
icsneoc2_chip_id_radmoon2_z7010_zynq = 104,
icsneoc2_chip_id_neovifire2_core_sg4 = 105,
icsneoc2_chip_id_radbms_mchip = 106,
icsneoc2_chip_id_radmoon2_zl_mchip = 107,
icsneoc2_chip_id_radgigastar_usbz_z7010_zynq = 108,
icsneoc2_chip_id_neovifire3_linux = 109,
icsneoc2_chip_id_radgigastar_usbz_z7007s_zynq = 110,
icsneoc2_chip_id_vem_01_8dw_zchip = 111,
icsneoc2_chip_id_radgalaxy_ffg_zynq = 112,
icsneoc2_chip_id_radmoon3_mchip = 113,
icsneoc2_chip_id_radcomet_zynq = 114,
icsneoc2_chip_id_vem_02_fr_zchip = 115,
icsneoc2_chip_id_rada2b_revb_zchip = 116,
icsneoc2_chip_id_radgigastar_ffg_zynq = 117,
icsneoc2_chip_id_vem_02_fr_fchip = 118,
icsneoc2_chip_id_connect_zchip = 121,
icsneoc2_chip_id_sfpmodule_88q2221_mchip = 122,
icsneoc2_chip_id_radgalaxy2_sysmon_chip = 123,
icsneoc2_chip_id_sfpmodule_88q3244_mchip = 124,
icsneoc2_chip_id_radcomet3_zchip = 125,
icsneoc2_chip_id_connect_linux = 126,
icsneoc2_chip_id_sfpmodule_lan8670_mchip = 127,
icsneoc2_chip_id_vem_04_t1s_lin_zchip = 129,
icsneoc2_chip_id_radmoont1s_zchip = 130,
icsneoc2_chip_id_radgigastar2_zynq = 131,
icsneoc2_chip_id_sfpmodule_ent11100_mchip = 132,
icsneoc2_chip_id_radgemini_mchip = 135,
icsneoc2_chip_id_maxsize, // Must be last entry, Don't use as a chip ID.
// Used for unknown or invalid chip ID
icsneoc2_chip_id_invalid = 255
} _icsneoc2_chip_id_t;
typedef uint8_t icsneoc2_chip_id_t;
#ifdef __cplusplus
}
#endif