From 31d47613e77eb2c9a2a3c2c2080449494afccb3c Mon Sep 17 00:00:00 2001
From: Kyle Schwarz <kschwarz@intrepidcs.com>
Date: Wed, 17 Apr 2024 14:24:36 -0400
Subject: [PATCH] RADGigastar: Update settings

---
 include/icsneo/device/idevicesettings.h       | 29 +++++++++++++++++++
 .../tree/radgigastar/radgigastarsettings.h    | 15 ++++++----
 2 files changed, 39 insertions(+), 5 deletions(-)

diff --git a/include/icsneo/device/idevicesettings.h b/include/icsneo/device/idevicesettings.h
index 326f9d2..d2b7ce3 100644
--- a/include/icsneo/device/idevicesettings.h
+++ b/include/icsneo/device/idevicesettings.h
@@ -327,6 +327,35 @@ typedef struct SERDESPOC_SETTINGS_t
 } SERDESPOC_SETTINGS;
 #define SERDESPOC_SETTINGS_SIZE 10
 
+enum
+{
+	SERDESGEN_MOD_ID_NONE = 0,
+	SERDESGEN_MOD_ID_FPD3_2x2 = 1,
+	SERDESGEN_MOD_ID_GMSL2_2x2 = 2,
+	SERDESGEN_MOD_ID_GMSL1_4x4 = 3,
+	SERDESGEN_MOD_ID_FPD3_TO_GMSL2_2x2 = 4,
+	// new modules go above this line
+	SERDESGEN_MOD_ID_UNKNOWN = -1,
+};
+
+#define SERDESGEN_SETTINGS_FLAG_TX_PATGEN_ENABLE 0x0001
+
+typedef struct SERDESGEN_SETTINGS_t
+{
+	/* 
+	 * bit0: enable pattern generator
+	 */
+	uint16_t flags;
+	uint8_t rsvd1;
+	uint8_t mod_id; // connected module passed back from device
+	uint16_t tx_speed; // Mbps per lane, all tx ports
+	uint16_t rx_speed; // Mbps per lane, all rx ports
+	// reserved space for the future
+	// maybe pattern generator settings
+	uint8_t rsvd2[24];
+} SERDESGEN_SETTINGS;
+#define SERDESGEN_SETTINGS_SIZE 32
+
 #define ETHERNET_SETTINGS2_FLAG_FULL_DUPLEX  0x01
 #define ETHERNET_SETTINGS2_FLAG_AUTO_NEG     0x02
 #define ETHERNET_SETTINGS2_FLAG_TCPIP_ENABLE 0x04
diff --git a/include/icsneo/device/tree/radgigastar/radgigastarsettings.h b/include/icsneo/device/tree/radgigastar/radgigastarsettings.h
index 72edec2..d5180d7 100644
--- a/include/icsneo/device/tree/radgigastar/radgigastarsettings.h
+++ b/include/icsneo/device/tree/radgigastar/radgigastarsettings.h
@@ -60,16 +60,17 @@ typedef struct {
 	struct
 	{
 		uint16_t hwComLatencyTestEn : 1;
-		uint16_t reserved : 15;
+		uint16_t disableUsbCheckOnBoot : 1;
+		uint16_t reserved : 14;
 	} flags;
 	ETHERNET_SETTINGS2 ethernet1;
 	ETHERNET_SETTINGS2 ethernet2;
 
 	LIN_SETTINGS lin1;
 
-    OP_ETH_GENERAL_SETTINGS opEthGen;
-    OP_ETH_SETTINGS opEth1;
-    OP_ETH_SETTINGS opEth2;
+	OP_ETH_GENERAL_SETTINGS opEthGen;
+	OP_ETH_SETTINGS opEth1;
+	OP_ETH_SETTINGS opEth2;
 
 	SERDESCAM_SETTINGS serdescam1;
 	SERDESPOC_SETTINGS serdespoc;
@@ -79,12 +80,16 @@ typedef struct {
 	SERDESCAM_SETTINGS serdescam4;
 	RAD_REPORTING_SETTINGS reporting;
 	uint16_t network_enables_4;
+	SERDESGEN_SETTINGS serdesgen;
+
+	RAD_GPTP_SETTINGS gPTP;
+	uint64_t network_enables_5;
 } radgigastar_settings_t;
 #pragma pack(pop)
 
 #ifdef __cplusplus
 
-static_assert(sizeof(radgigastar_settings_t) == 634, "RADGigastar settings size mismatch");
+static_assert(sizeof(radgigastar_settings_t) == 710, "RADGigastar settings size mismatch");
 
 #include <iostream>